dorsal/arxiv
View SchemaNoise-Tolerant Streaming Real-Time Data Acquisition Fabric for Pulsed Accelerators
| Authors | E. J. Siskind |
|---|---|
| Categories | |
| ArXiv ID | physics/0212102 |
| URL | https://arxiv.org/abs/physics/0212102 |
Abstract
A noise-tolerant data communications fabric has been developed to meet the real-time data acquisition and control requirements of fast feedback loops, machine protection systems, pulse-to-pulse sequencing, and machine-experiment communications at next-generation pulsed accelerators such as the Next Linear Collider ("NLC"). The fabric is constructed from "platform" or "system-on-a-chip" field programmable gate arrays ("FPGAs") containing embedded processors, block memory, and multi-gigabit serial transceivers interconnected via an array of point-to-point fiber-optic physical links for standard networks such as gigabit Ethernet. The FPGA-based link hardware segments messages of varying priorities into a continuous sequence of fixed-length data cells, interrupting the cell stream of lower priority messages with those comprising higher priority traffic. A high level of noise-tolerance is provided by dedicating almost half the contents of each cell to Reed-Solomon forward error correcting code ("ECC") data. Further reliability is achieved by hardware implementation of algorithms for cell-by-cell receipt acknowledgment, receipt timeout and retransmission after a tunable round-trip propagation delay, and separate backpressure flow control for each priority.
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"abstract": "A noise-tolerant data communications fabric has been developed to meet the\nreal-time data acquisition and control requirements of fast feedback loops,\nmachine protection systems, pulse-to-pulse sequencing, and machine-experiment\ncommunications at next-generation pulsed accelerators such as the Next Linear\nCollider (\"NLC\"). The fabric is constructed from \"platform\" or\n\"system-on-a-chip\" field programmable gate arrays (\"FPGAs\") containing embedded\nprocessors, block memory, and multi-gigabit serial transceivers interconnected\nvia an array of point-to-point fiber-optic physical links for standard networks\nsuch as gigabit Ethernet. The FPGA-based link hardware segments messages of\nvarying priorities into a continuous sequence of fixed-length data cells,\ninterrupting the cell stream of lower priority messages with those comprising\nhigher priority traffic. A high level of noise-tolerance is provided by\ndedicating almost half the contents of each cell to Reed-Solomon forward error\ncorrecting code (\"ECC\") data. Further reliability is achieved by hardware\nimplementation of algorithms for cell-by-cell receipt acknowledgment, receipt\ntimeout and retransmission after a tunable round-trip propagation delay, and\nseparate backpressure flow control for each priority.",
"arxiv_id": "physics/0212102",
"authors": [
"E. J. Siskind"
],
"categories": [
"physics.ins-det"
],
"title": "Noise-Tolerant Streaming Real-Time Data Acquisition Fabric for Pulsed Accelerators",
"url": "https://arxiv.org/abs/physics/0212102"
},
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