dorsal/arxiv
View SchemaQuantum Memory Hierarchies: Efficient Designs to Match Available Parallelism in Quantum Computing
| Authors | Darshan D. Thaker, Tzvetan S. Metodi, Andrew W. Cross, Isaac L. Chuang, Frederic T. Chong |
|---|---|
| Categories | |
| ArXiv ID | quant-ph/0604070 |
| URL | https://arxiv.org/abs/quant-ph/0604070 |
Abstract
The assumption of maximum parallelism support for the successful realization of scalable quantum computers has led to homogeneous, ``sea-of-qubits'' architectures. The resulting architectures overcome the primary challenges of reliability and scalability at the cost of physically unacceptable system area. We find that by exploiting the natural serialization at both the application and the physical microarchitecture level of a quantum computer, we can reduce the area requirement while improving performance. In particular we present a scalable quantum architecture design that employs specialization of the system into memory and computational regions, each individually optimized to match hardware support to the available parallelism. Through careful application and system analysis, we find that our new architecture can yield up to a factor of thirteen savings in area due to specialization. In addition, by providing a memory hierarchy design for quantum computers, we can increase time performance by a factor of eight. This result brings us closer to the realization of a quantum processor that can solve meaningful problems.
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"abstract": "The assumption of maximum parallelism support for the successful realization\nof scalable quantum computers has led to homogeneous, ``sea-of-qubits\u0027\u0027\narchitectures. The resulting architectures overcome the primary challenges of\nreliability and scalability at the cost of physically unacceptable system area.\nWe find that by exploiting the natural serialization at both the application\nand the physical microarchitecture level of a quantum computer, we can reduce\nthe area requirement while improving performance. In particular we present a\nscalable quantum architecture design that employs specialization of the system\ninto memory and computational regions, each individually optimized to match\nhardware support to the available parallelism. Through careful application and\nsystem analysis, we find that our new architecture can yield up to a factor of\nthirteen savings in area due to specialization. In addition, by providing a\nmemory hierarchy design for quantum computers, we can increase time performance\nby a factor of eight. This result brings us closer to the realization of a\nquantum processor that can solve meaningful problems.",
"arxiv_id": "quant-ph/0604070",
"authors": [
"Darshan D. Thaker",
"Tzvetan S. Metodi",
"Andrew W. Cross",
"Isaac L. Chuang",
"Frederic T. Chong"
],
"categories": [
"quant-ph"
],
"title": "Quantum Memory Hierarchies: Efficient Designs to Match Available Parallelism in Quantum Computing",
"url": "https://arxiv.org/abs/quant-ph/0604070"
},
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