{
  "annotation_id": "b1d39835-4f14-4254-908a-9a9284796943",
  "date_created": "2026-03-02T18:00:43.533000Z",
  "date_modified": "2026-03-02T18:00:43.533000Z",
  "file_hash": "08d456b4f5d1ed1329f4d2e08485b34254a0fdcd3a112db8ff97d9e2118a4afc",
  "private": false,
  "record": {
    "abstract": "The High Level Trigger (HLT) of the ALICE experiment requires massive\nparallel computing. One of the main tasks of the HLT system is two-dimensional\ncluster finding on raw data of the Time Projection Chamber (TPC), which is the\nmain data source of ALICE. To reduce the number of computing nodes needed in\nthe HLT farm, FPGAs, which are an intrinsic part of the system, will be\nutilized for this task. VHDL code implementing the Fast Cluster Finder\nalgorithm, has been written, a testbed for functional verification of the code\nhas been developed, and the code has been synthesized",
    "arxiv_id": "physics/0306017",
    "authors": [
      "G. Grastveit",
      "H. Helstrup",
      "V. Lindenstruth",
      "C. Loizides",
      "D. Roehrich",
      "B. Skaali",
      "T. Steinbeck",
      "R. Stock",
      "H. Tilsner",
      "K. Ullaland",
      "A. Vestbo",
      "T. Vik"
    ],
    "categories": [
      "physics.ins-det"
    ],
    "title": "FPGA Co-processor for the ALICE High Level Trigger",
    "url": "https://arxiv.org/abs/physics/0306017"
  },
  "schema_id": "dorsal/arxiv",
  "source": {
    "execution_id": "2e67d3eb-abd6-456d-a089-f84d2d4a4f61",
    "id": "arXiv Dataset IDs",
    "type": "Model",
    "variant": "snapshot-2026-03-01",
    "version": "0.1.0"
  },
  "user_id": 1000002
}