{
  "annotation_id": "8ea55488-09a8-40fe-8f31-f6759a1f2284",
  "date_created": "2026-03-02T18:00:43.248000Z",
  "date_modified": "2026-03-02T18:00:43.248000Z",
  "file_hash": "9eafc0d9e84bf43f8ec49a45001ea7cc1a2012614a176672f22011ec365f6504",
  "private": false,
  "record": {
    "abstract": "A hierarchical approach to the construction of compound distributions for\nprocess-induced faults in IC manufacture is proposed. Within this framework,\nthe negative binomial distribution and the compound binomial distribution are\ntreated as level-1 models. The hierarchical approach to fault distribution\noffers an integrated picture of how fault density varies from region to region\nwithin a wafer, from wafer to wafer within a batch, and so on. A theory of\ncompound-distribution hierarchies is developed by means of generating\nfunctions. With respect to applications, hierarchies of yield means and yield\nprobability-density functions are considered and an in-process measure of yield\nloss is introduced. It is shown that the hierarchical approach naturally\nembraces the Bayesian approach.",
    "arxiv_id": "physics/0303039",
    "authors": [
      "Yu. I. Bogdanov",
      "N. A. Bogdanova",
      "V. L. Dshkhunyan"
    ],
    "categories": [
      "physics.data-an",
      "cond-mat.stat-mech"
    ],
    "journal_ref": "Russian Microelectronics, 2003, V.32, N 1, P. 51",
    "title": "Statistical Yield Modeling for IC Manufacture: Hierarchical Fault   Distributions",
    "url": "https://arxiv.org/abs/physics/0303039"
  },
  "schema_id": "dorsal/arxiv",
  "source": {
    "execution_id": "e46ab89c-39be-4944-b0a8-7b41f5814752",
    "id": "arXiv Dataset IDs",
    "type": "Model",
    "variant": "snapshot-2026-03-01",
    "version": "0.1.0"
  },
  "user_id": 1000002
}