dorsal/arxiv
View SchemaFast and Flexible CCD Driver System Using Fast DAC and FPGA
| Authors | Emi Miyata, Chikara Natsukari, Daisuke Akutsu, Tomoyuki Kamazuka, Masaharu Nomachi, Masaharu Ozaki |
|---|---|
| Categories | |
| ArXiv ID | physics/0008233 |
| URL | https://arxiv.org/abs/physics/0008233 |
| DOI | 10.1016/S0168-9002(00)01015-9 |
| Journal | Nucl.Instrum.Meth. A459 (2001) 157-164 |
Abstract
We have developed a completely new type of general-purpose CCD data acquisition system which enables one to drive any type of CCD using any type of clocking mode. A CCD driver system widely used before consisted of an analog multiplexer (MPX), a digital-to-analog converter (DAC), and an operational amplifier. A DAC is used to determine high and low voltage levels and the MPX selects each voltage level using a TTL clock. In this kind of driver board, it is difficult to reduce the noise caused by a short of high and low level in MPX and also to select many kinds of different voltage levels. Recent developments in semiconductor IC enable us to use a very fast sampling ($\sim$ 10MHz) DAC with low cost. We thus develop the new driver system using a fast DAC in order to determine both the voltage level of the clock and the clocking timing. We use FPGA (Field Programmable Gate Array) to control the DAC. We have constructed the data acquisition system and found that the CCD functions well with our new system. The energy resolution of Mn K$\alpha$ has a full-width at half-maximum of $\simeq$ 150 eV and the readout noise of our system is $\simeq$ 8 e$^-$.
{
"annotation_id": "3749a942-919b-4d8d-9feb-3725f20304ad",
"date_created": "2026-03-02T18:00:32.418000Z",
"date_modified": "2026-03-02T18:00:32.418000Z",
"file_hash": "2f7811663465186062c4ee7f08beb0af01205828aa0a156d5bd8a56f74e64290",
"private": false,
"record": {
"abstract": "We have developed a completely new type of general-purpose CCD data\nacquisition system which enables one to drive any type of CCD using any type of\nclocking mode. A CCD driver system widely used before consisted of an analog\nmultiplexer (MPX), a digital-to-analog converter (DAC), and an operational\namplifier. A DAC is used to determine high and low voltage levels and the MPX\nselects each voltage level using a TTL clock. In this kind of driver board, it\nis difficult to reduce the noise caused by a short of high and low level in MPX\nand also to select many kinds of different voltage levels. Recent developments\nin semiconductor IC enable us to use a very fast sampling ($\\sim$ 10MHz) DAC\nwith low cost. We thus develop the new driver system using a fast DAC in order\nto determine both the voltage level of the clock and the clocking timing. We\nuse FPGA (Field Programmable Gate Array) to control the DAC. We have\nconstructed the data acquisition system and found that the CCD functions well\nwith our new system. The energy resolution of Mn K$\\alpha$ has a full-width at\nhalf-maximum of $\\simeq$ 150 eV and the readout noise of our system is $\\simeq$\n8 e$^-$.",
"arxiv_id": "physics/0008233",
"authors": [
"Emi Miyata",
"Chikara Natsukari",
"Daisuke Akutsu",
"Tomoyuki Kamazuka",
"Masaharu Nomachi",
"Masaharu Ozaki"
],
"categories": [
"physics.ins-det"
],
"doi": "10.1016/S0168-9002(00)01015-9",
"journal_ref": "Nucl.Instrum.Meth. A459 (2001) 157-164",
"title": "Fast and Flexible CCD Driver System Using Fast DAC and FPGA",
"url": "https://arxiv.org/abs/physics/0008233"
},
"schema_id": "dorsal/arxiv",
"source": {
"execution_id": "a1edde49-3753-45c5-9082-d4a7a520b7b1",
"id": "arXiv Dataset IDs",
"type": "Model",
"variant": "snapshot-2026-03-01",
"version": "0.1.0"
},
"user_id": 1000002
}